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[XiangShan Biweekly 104] 20260608

Welcome to XiangShan biweekly column! Through this column, we will regularly share the latest development progress of XiangShan. This is the 104th issue of the biweekly report.

We are very excited to share with you an important component in the "XiangShan" + "Ruyi" ecosystem: RuyiSDK! This is a one-stop development resource management platform for RISC-V architecture, which integrates toolchains, simulators, runtime environments, and debugging tools based on the ruyi package manager and IDE plugin system, providing full-process development support. The platform has built a comprehensive matrix of RISC-V development boards and operating system support, providing developers with a more convenient operating experience and serving as an important infrastructure for promoting RISC-V development and ecosystem construction.

You can get more information through the following links:

RISC-V European Summit is ongoing! The XiangShan team has multiple talks and posters at the summit, and the detailed schedule can be found here.

In the opening report of the RISC-V International, CEO Andrea Gallo introduced the application of XiangShan in high-performance server scenarios.

Andrea Gallo introducing the application of XiangShan in high-performance server scenarios

Deputy Director of the Institute of Computing Technology, Chinese Academy of Sciences, and Chief Scientist of Beijing Open Source Chip Research Institute, Researcher Bao Yungang gave a report titled "XiangShan Practice: The Path to Industrial Deployment of Open-Source High-Performance RISC-V Processor", introducing the industrial deployment path of XiangShan.

Researcher Bao Yungang introducing the industrial deployment path of XiangShan

XiangShan family

We also held the workshop of Unity Chip for the first time, sharing with everyone the exploration and practice of software-native open-source chip intelligent crowdsourcing verification.

Unity Chip workshop

Regarding the recent development progress of XiangShan, the frontend continues to optimize timing while reducing redirect latency; the backend implements some new features and instruction set extensions; the memory subsystem fixes some bugs while optimizing L2 timing; XSAI optimizes code structure while advancing HBL2 support for CHI.

  • 分类于 Biweekly
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【香山双周报 104】20260608 期

欢迎来到香山双周报专栏，我们将通过这一专栏定期介绍香山的开发进展。本次是第 104 期双周报。

我们非常高兴地与大家分享“香山”+“如意”生态中的重要组成部分 RuyiSDK！这是一个面向 RISC-V 架构的一站式开发资源管理平台，依托 ruyi 包管理器与 IDE 插件体系，整合工具链、模拟器、运行时环境及调试工具，提供全流程开发支持。平台构建了完善的 RISC-V 开发板与操作系统支持矩阵，为开发者提供更便捷的操作体验，是推动 RISC-V 开发与生态建设的重要基础设施。

大家可以通过以下链接获取更多信息：

RISC-V 欧洲峰会正在举行！香山团队在峰会上有多个 talk 和 poster，详细日程见这里。

在 RISC-V 国际协会的开场报告中，CEO Andrea Gallo 介绍了香山在高性能服务器场景的应用。

Andrea Gallo 介绍香山在高性能服务器场景的应用

中国科学院计算技术研究所副所长、北京开源芯片研究院首席科学家包云岗研究员作了题为 XiangShan Practice: The Path to Industrial Deployment of Open-Source High-Performance RISC-V Processor 的报告，介绍了香山的产业部署之路。

包云岗研究员介绍香山的产业部署之路

香山家族

我们还首次举办了万众一芯的 workshop，与大家分享软件原生的开源芯片智能众包验证探索与实践。

万众一芯 workshop

关于香山近期开发进展，前端继续优化时序，同时降低了重定向延迟；后端实现了一些新特性与指令集扩展；访存修复了一些 bug，同时优化了 L2 的时序；XSAI 优化了代码结构，同时推进了 HBL2 对 CHI 的支持。

  • 分类于 Biweekly-en
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[XiangShan Biweekly 103] 20260525

Welcome to XiangShan biweekly column! Through this column, we will regularly share the latest development progress of XiangShan. This is the 103rd issue of the biweekly report.

We recently received many issues on GitHub! We welcome every developer who is interested in XiangShan to communicate and provide feedback with us. Whether it's bug reports, feature suggestions, or questions about using XiangShan, we will respond in a timely manner. In this biweekly report, we share a very interesting issue with you, through which we fixed four bugs.

As for the recent development of XiangShan, the frontend fixed some bugs while continuing to optimize timing; the backend implemented new extensions and fixed some bugs; the memory subsystem expanded L2 to 2MB while optimizing PPA and code style; XSAI implemented overlapping execution of the C matrix memory access module and fixed some bugs.

  • 分类于 Biweekly
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【香山双周报 103】20260525 期

欢迎来到香山双周报专栏，我们将通过这一专栏定期介绍香山的开发进展。本次是第 103 期双周报。

最近我们在 GitHub 上收到了很多 issue！我们欢迎每一位关注香山的开发者与我们交流反馈，无论是 bug 报告、功能建议还是使用香山时需要的问题，我们都会及时回复。在本次双周报中，我们与大家分享了一个非常有趣的 issue，通过这个 issue，我们修复了四个 bug。

关于香山近期开发进展，前端在修复了一些 bug，同时继续优化时序；后端实现了新的扩展，并修复了一些 bug；访存将 L2 扩容到了 2MB，同时优化了 PPA 和代码风格；XSAI 实现了 C 矩阵访存模块的重叠执行，并修复了一些 bug。

  • 分类于 Biweekly-en
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[XiangShan Biweekly 102] 20260511

Welcome to XiangShan biweekly column! Through this column, we will regularly share the latest development progress of XiangShan. This is the 102nd issue of the biweekly report.

The development of X200, SpacemiT's third-generation high-performance RISC-V processor core derived from XiangShan Kunming Lake V2, has been completed. Based on a conventional cloud-computing processor core, X200 has been specifically optimized for cloud-side Agent applications and flagship end-device Agent applications. Its SPECint 2006 performance reaches 16.0 points/GHz, and its single-core frequency can reach 3.3GHz. Compared with X100, its performance per core has improved by more than 100%, reaching 50 SPECint 2006 points/Core.

Even more encouraging than the fact that X200 builds on Kunming Lake V2 is that the full XiangShan open-source infrastructure was used throughout X200's development. This is the part below the surface that supports X200 on its path toward production readiness. These open-source toolchains greatly accelerated X200's development on top of XiangShan and provided strong assurance for its quality.

As for recent XiangShan development, the frontend is implementing 2-fetch while optimizing timing; the backend and memory teams fixed several functional bugs and continued advancing the new L2 design; XSAI added FP8 support for the matrix unit while also improving code quality and evaluation tools.

  • 分类于 Biweekly
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【香山双周报 102】20260511 期

欢迎来到香山双周报专栏，我们将通过这一专栏定期介绍香山的开发进展。本次是第 102 期双周报。

基于香山昆明湖 V2 二次开发的进迭时空第三代高性能 RISC-V 处理器核 X200 研发完成！X200 在传统云计算处理器核的基础上，面向云端 Agent 应用与旗舰级终端 Agent 应用进行了针对性优化，SPECInt 2006 性能达到 16.0 分/GHz，单核频率可达 3.3GHz；相比 X100，单位性能提升 100% 以上，达到 SPECint 2006 50 分/Core。

相比使用了昆明湖 V2，更让我们高兴的是 X200 的研究过程中使用了全套的香山开源基础设施，这是支撑 X200 走向可量产状态的冰山水面下部分。这些开源工具链极大加速了 X200 二次开发的效率，为 X200 的质量提供了有力保障。

关于香山近期开发进展，前端在优化时序的同时进行 2-fetch 实现；后端和访存修复了一些功能 bug，并继续推进新版 L2 的设计；XSAI 为矩阵模块添加了 FP8 支持，同时优化了代码质量和评估工具。

  • 分类于 Biweekly-en
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[XiangShan Biweekly 101] 20260427

Welcome to XiangShan biweekly column! Through this column, we will regularly share the latest development progress of XiangShan. This is the 101st issue of the biweekly report.

The design document of Kunming Lake V3 has been gradually released, and we welcome everyone to read and discuss it with us! Currently, the new design document includes two modules: ICache and BPU. The design documents for other modules will be released as development progresses. The design document is still available at https://docs.xiangshan.cc/projects/design/zh-cn/. If you are interested in the design document of Kunming Lake V2, you can switch branches at the bottom right corner of the webpage to view it.

As for recent XiangShan core development, the frontend optimized branch predictor timing, while backend and memory teams fixed bugs and continued module refactoring and testing.

  • 分类于 Biweekly
  • 需要 2 分钟阅读时间

【香山双周报 101】20260427 期

欢迎来到香山双周报专栏，我们将通过这一专栏定期介绍香山的开发进展。本次是第 101 期双周报。

昆明湖 V3 的设计文档已经逐步公开，欢迎大家阅读并与我们讨论！目前，新版设计文档包含 ICache 和 BPU 两个模块，其他模块的设计文档将随着开发的进行陆续发布。设计文档仍然在 https://docs.xiangshan.cc/projects/design/zh-cn/，如果大家对昆明湖 V2 的设计文档感兴趣，可以通过网页右下角切换分支来查看。

关于香山核近期开发进展，前端着重优化了 BPU 的时序，后端和访存实现了多个新特性，并且修复了一些功能 bug。

  • 分类于 Biweekly-en
  • 需要 7 分钟阅读时间

[XiangShan Biweekly 100] 20260413

Welcome to XiangShan biweekly column! Through this column, we will regularly share the latest development progress of XiangShan. This is the 100th issue of the biweekly report.

Before we knew it, XiangShan Biweekly has reached its 100th issue. At this special milestone, the XiangShan project also welcomes an important new member: XiangShan AI (XSAI), a unified general-purpose-and-inference AI processor implemented on top of XiangShan’s open-source, high-performance RISC-V processor. Starting from this issue, the biweekly will include XSAI development updates.

XSAI is the XiangShan team’s exploration of unified general-purpose-and-inference AI chips on top of its existing RISC-V CPU ecosystem, and a practical application of XiangShan’s agile development methodology. The Beijing Institute of Open Source Chip, together with the Microprocessor Technology Research Center and the Center for Advanced Computer Systems at the Institute of Computing Technology, Chinese Academy of Sciences, jointly participate in XSAI development. Like XiangShan, XSAI is also a fully open-source project, and its repository is available at https://github.com/OpenXiangShan/XSAI. In 2026, we will gradually release instruction extension manuals, architecture documentation, and user manuals, and open-source our development toolchain.

In addition, we would like to give you a sneak peek that the XiangShan tutorial at ISCA 2026 in Raleigh, USA at the end of June will also include content on the XSAI unified general-purpose-and-inference processor for the first time. We look forward to seeing you there!

As for recent XiangShan core development, the frontend optimized branch predictor timing, while backend and memory teams fixed bugs and continued module refactoring and testing.

  • 分类于 Biweekly
  • 需要 5 分钟阅读时间

【香山双周报 100】20260413 期

欢迎来到香山双周报专栏，我们将通过这一专栏定期介绍香山的开发进展。本次是第 100 期双周报。

不知不觉间，香山双周报已经来到了第 100 期！在这个特殊的时刻，香山项目也迎来了一位重要的新成员：香山AI（XSAI），一个基于香山开源高性能 RISC-V 处理器实现的“通推一体”AI 处理器。从本期开始，双周报将包含 XSAI 的开发进展。

XSAI 是香山团队基于已有 RISC-V CPU 生态积累基础上，对于“通推一体” AI 芯片的探索，也是对香山敏捷开发方法学的实践。北京开源芯片研究院与中国科学院计算技术研究所微处理器研究中心、先进计算机系统研究中心共同参与了 XSAI 的开发。和香山一样，XSAI 也是一个完全开源的项目，其仓库地址为 https://github.com/OpenXiangShan/XSAI。我们将在 2026 年逐步发布指令扩展手册、架构文档、用户手册，并且开源我们的开发工具链。

另外，我们向大家提前预告，在 6 月底于美国罗利举办的 ISCA 2026 的香山 tutorial 中，也将首次包含 XSAI“通推一体”处理器的内容，欢迎大家来玩！

关于香山核近期开发进展，前端优化了分支预测器的时序，后端和访存继续修复了一些 bug，并继续推进模块的重构与测试。