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2026

[XiangShan Biweekly 110] 20260902

Welcome to XiangShan biweekly column! Through this column, we will regularly share the latest development progress of XiangShan. This is the 110th issue of the biweekly report.

Regarding the recent development progress of XiangShan, the frontend has fixed several branch-prediction and instruction-fetch issues and optimized uBTB training and IFU/ICache timing; the backend has advanced V3 register-file refactoring; the memory and cache subsystem has fixed several issues while continuing V3 development; XSAI has fixed matrix decoding, memory-access, and operand-wakeup issues and improved DiffTest and CI; in terms of infrastructure, FPGA DiffTest, NEMU/QEMU checkpointing, and GSIM build and simulation capabilities have been enhanced, while XS-GEM5 model calibration and performance exploration have continued.

Special thanks to community contributor muke101 for providing an open-source gem5 implementation of the PHAST memory-dependence prediction algorithm through a GitHub issue. XS-GEM5 further refactored and optimized this implementation.

We are also pleased to announce that the XiangShan team and Professor Trevor E. Carlson of the National University of Singapore will jointly host a workshop entitled Agile Development and Verification for Chips during MICRO 2026 in Greece. Scheduled for October 31, the workshop is now accepting submissions from the community. Please visit the submission website for details and to submit your work. We look forward to meeting you in Greece for an engaging exchange of ideas!

【香山双周报 110】20260902 期

欢迎来到香山双周报专栏,我们将通过这一专栏定期介绍香山的开发进展。本次是第 110 期双周报。

关于香山近期开发进展,前端修复了多个分支预测与取指问题,并优化了 uBTB 训练及 IFU/ICache 时序;后端推进了 V3 寄存器堆相关重构;访存与缓存修复了多个问题,并继续推进 V3 开发;XSAI 修复了矩阵译码、访存和操作数唤醒问题,并完善了 DiffTest 与 CI;基础设施方面,增强了 FPGA DiffTest、NEMU/QEMU checkpoint 以及 GSIM 构建和仿真能力,并持续推进 XS-GEM5 模型对齐和性能探索。

社区贡献者 muke101 通过 GitHub Issue 向我们提供了 PHAST 内存依赖预测算法的gem5 开源实现,在此特别致谢。XS-GEM5 在该实现基础上进行了进一步的重构与优化。

同时向大家预告一则消息:香山团队将联合新加坡国立大学的 Trevor E. Carlson 教授,在希腊举行的 MICRO 2026 会议期间举办题为 Agile Development and Verification for Chips 的专题研讨会(workshop)。研讨会定于 10 月 31 日举行,现面向社区公开征稿。欢迎访问投稿网站(https://workshop.xiangshan.cc)了解详情并投稿,期待届时与大家相聚希腊,共同交流与探讨!

[XiangShan Biweekly 109] Infrastructure Joins the XiangShan Biweekly!

Welcome to XiangShan biweekly column! Through this column, we will regularly share the latest development progress of XiangShan. This is the 109th issue of the biweekly report.

This issue features a special section on infrastructure, focusing on the agile chip development platform built by the XiangShan team around hardware description languages, functional verification, and performance exploration. Starting with this issue, the biweekly report will also include updates on infrastructure development.

Regarding the recent development progress of XiangShan, the frontend continues to fix bugs and optimize critical-path timing; the backend adds features such as pointer-masking extensions and expands TopDown analysis; the memory and cache subsystem integrates the L2 CDP prefetcher and fixes several bugs; XSAI supports multi-precision transposed loads and improves multi-channel DiffTest and MMA debugging capabilities.

【香山双周报 109】基础设施加入双周报!

欢迎来到香山双周报专栏,我们将通过这一专栏定期介绍香山的开发进展。本次是第 109 期双周报。

本期双周报特别推出基础设施专题,重点介绍香山团队围绕电路描述语言、功能验证和性能探索建设的敏捷芯片开发平台。同时从本期开始,双周报将包含基础设施方面的工作进展。

关于香山近期开发进展:前端持续修复问题并优化关键路径时序;后端新增指针掩码扩展等特性,并扩展了 TopDown 分析;访存与缓存集成了 L2 CDP 预取器,同时修复了若干 bug;XSAI 支持了多精度转置 load,并完善了多通道 DiffTest 与 MMA 调试能力。

[XiangShan Biweekly 108] 20260803

Welcome to XiangShan biweekly column! Through this column, we will regularly share the latest development progress of XiangShan. This is the 108th issue of the biweekly report.

On July 21, renowned computer expert Mao Decao visited BOSC and gave a lecture titled "Artificial Intelligence and Processor Chips."

Mao Decao's lecture

Mao's connection with XiangShan goes beyond this visit. He also wrote RISC-V CPU Chip Design: XiangShan Source Code Annotated. He began writing the book in 2021 at the age of 76, working alone for nearly 10 hours a day at times. It took him 3.5 years to complete, by which time he was 79 years old.

The core XiangShan team also had an in-depth discussion with Mao, listening to the valuable experience and profound insights into the industry that he has accumulated over the years. We are deeply honored that Mao agrees with XiangShan's design philosophy. We will continue striving to improve XiangShan and make it a benchmark in the open-source processor field.

Regarding the recent development progress of XiangShan, the frontend continues to optimize timing; the backend fixes some bugs in V2 and calibrates the topdown counter; the memory and cache implement a dual-channel TileLink bus and optimize the LSU; XSAI updates the AME version and fixes several bugs.

【香山双周报 108】20260803 期

欢迎来到香山双周报专栏,我们将通过这一专栏定期介绍香山的开发进展。本次是第 108 期双周报。

7 月 21 日,著名计算机专家毛德操老师到访开芯院,并为大家带来了题为《人工智能与处理器芯片》的讲座。

毛德操老师讲座

毛老师与香山的缘分不止于此,他还撰写过《RISC-V CPU 芯片设计:香山源代码剖析》。这本书是毛老师在76岁(2021年),自己 1 个人,时常工作近 10 小时/天,花费 3.5 年的时间著作而成。成书时,毛老师已经79岁。

香山的核心团队也与毛老师进行了深入交流,听取毛老师多年来对产业界的深刻见解和宝贵经验。毛老师能够认同香山的设计理念,这让我们感到非常荣幸,我们也将继续努力,将香山越做越好,成为开源处理器领域的标杆。

关于香山近期开发进展,前端继续优化时序;后端修复了 V2 的一些 bug,同时校准了 topdown 计数器;访存与缓存实现了双通道 TileLink 总线,并对 LSU 进行了优化;XSAI 更新了 AME 版本,同时修复了若干 bug。

[XiangShan Biweekly 107] 20260720

Welcome to XiangShan biweekly column! Through this column, we will regularly share the latest development progress of XiangShan. This is the 107th issue of the biweekly report.

Regarding the recent development progress of XiangShan, the frontend has fixed timing issues in multiple modules and resolved some bugs reported by the community; the backend has fixed several bugs related to CSR, debug mode, and performance events, and synchronized V2 fixes to V3; in terms of memory access and caching, support for pre-allocated StoreQueue, LoadQueueReplay fast wakeup, and dual-port L1-L2 TileLink bus has been added, along with multiple bug fixes; XSAI has fixed control signals for load/store whole C instructions and added support for configurable multi-channel memory access in CUTE.

【香山双周报 107】20260720 期

欢迎来到香山双周报专栏,我们将通过这一专栏定期介绍香山的开发进展。本次是第 107 期双周报。

关于香山近期开发进展,前端修复了多个模块的时序问题,并修复了一些由社区发现的 bug;后端修复了多个 CSR、调试模式和性能事件相关的 bug,并同步了 V2 的修复到 V3;访存与缓存方面,支持了预分配 StoreQueue、LoadQueueReplay 快速唤醒和双端口 L1-L2 TileLink 总线,并修复了多个 bug;XSAI 修复了 load/store whole C 指令的控制信号,并支持可配置的 CUTE 多通道访存。

[XiangShan Biweekly 106] 20260706

Welcome to XiangShan biweekly column! Through this column, we will regularly share the latest development progress of XiangShan. This is the 106th issue of the biweekly report.

The XiangShan tutorial at ISCA 2026 was held ~~not so~~ smoothly! Although some students could not present on site due to visa issues, we quickly arranged backup speakers and ultimately ensured that the tutorial was completed with high quality. Special thanks to everyone who follows XiangShan's development!

Regarding the recent development progress of XiangShan, the frontend added support for the 2-fetch feature; the memory subsystem optimized DCache, Sbuffer, and the prefetchers; XSAI supported new matrix memory access modes and updated the instruction extension.

【香山双周报 106】20260706 期

欢迎来到香山双周报专栏,我们将通过这一专栏定期介绍香山的开发进展。本次是第 106 期双周报。

ISCA 2026 香山 tutorial ~~不那么~~顺利举办!虽然一些同学因为签证原因没能现场报告,但我们紧急召集了替补,最终保证了 tutorial 高质量完成。特别感谢每一位关注香山发展的伙伴们!

关于香山近期开发进展,前端支持了 2-fetch 特性;访存优化了 DCache、Sbuffer 和预取器;XSAI 支持了新的矩阵访存模式,同时更新了指令扩展。